39 search results - page 4 / 8 » Compiling for SIMD Within a Register |
118
Voted
ICCAD
2005
IEEE
15 years 10 months ago
2005
IEEE
Many commercially available embedded processors are capable of extending their base instruction set for a specific domain of applications. While steady progress has been made in t...
117
Voted
ISCA
2002
IEEE
15 years 25 days ago
2002
IEEE
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
100
Voted
CC
2003
Springer
15 years 6 months ago
2003
Springer
We define the Value State Dependence Graph (VSDG). The VSDG is a form of the Value Dependence Graph (VDG) extended by the addition of state dependence edges to model sequentialise...
100
Voted
VLSID
1999
IEEE
15 years 5 months ago
1999
IEEE
Abstract Code optimization for digital signal processors DSPs has been identi ed as an important new topic in system-level design of embedded systems. Both DSP processors and algor...
79
Voted
CGO
2006
IEEE
15 years 7 months ago
2006
IEEE
Explicit Data Graph Execution (EDGE) architectures offer the possibility of high instruction-level parallelism with energy efficiency. In EDGE architectures, the compiler breaks ...