1133 search results - page 17 / 227 » Compiling for Speculative Architectures |
105
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ASPLOS
2010
ACM
15 years 6 months ago
2010
ACM
In this paper we evaluate the atomic region compiler abstraction by incorporating it into a commercial system. We find that atomic regions are simple and intuitive to integrate i...
EUROMICRO
1998
IEEE
15 years 4 months ago
1998
IEEE
In this paper we present a novel processor microarchitecture that relieves three of the most important bottlenecks of superscalar processors: the serialization imposed by true dep...
100
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CODES
2008
IEEE
15 years 6 months ago
2008
IEEE
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
114
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HPCA
2001
IEEE
16 years 4 days ago
2001
IEEE
This paper introduces a router delay model that accurately models key aspects of modern routers. The model accounts for the pipelined nature of contemporary routers, the specific ...
ISCA
2003
IEEE
15 years 5 months ago
2003
IEEE
A majority of the papers published in leading computer architecture conferences use SPEC CPU2000, or its predecessor SPEC CPU95, which has become the de facto standard for measuri...