931 search results - page 109 / 187 » Compiling for vector-thread architectures |
124
click to vote
DAC
2004
ACM
16 years 5 months ago
2004
ACM
Scratch-pad memories (SPMs) enable fast access to time-critical data. While prior research studied both static and dynamic SPM management strategies, not being able to keep all ho...
126
click to vote
HPCA
2005
IEEE
16 years 5 months ago
2005
IEEE
The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Furthermore, its power density makes it a hot-spot requiring expensive cooling sy...
108
click to vote
ICCD
2000
IEEE
16 years 1 months ago
2000
IEEE
In superscalar architectures, out-of-order issue mechanisms increase performance by dynamically rescheduling instructions that cannot be statically reordered by the compiler. Whil...
129
click to vote
CHI
2010
ACM
15 years 11 months ago
2010
ACM
Interpreting compiler errors and exception messages is challenging for novice programmers. Presenting examples of how other programmers have corrected similar errors may help novi...
132
click to vote
IEEEPACT
2009
IEEE
15 years 11 months ago
2009
IEEE
Abstract—Load elimination is a classical compiler transformation that is increasing in importance for multi-core and many-core architectures. The effect of the transformation is ...