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EUROMICRO
1998
IEEE
15 years 9 months ago
The Latency Hiding Effectiveness of Decoupled Access/Execute Processors
Several studies have demonstrated that out-of-order execution processors may not be the most adequate organization for wide issue processors due to the increasing penalties that w...
Joan-Manuel Parcerisa, Antonio González
HPCA
1997
IEEE
15 years 9 months ago
Datapath Design for a VLIW Video Signal Processor
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S....
ARC
2006
Springer
157views Hardware» more  ARC 2006»
15 years 8 months ago
PISC: Polymorphic Instruction Set Computers
We introduce a new paradigm in the computer architecture referred to as Polymorphic Instruction Set Computers (PISC). This new paradigm, in difference to RISC/CISC, introduces hard...
Stamatis Vassiliadis, Georgi Kuzmanov, Stephan Won...
IWMM
2000
Springer
137views Hardware» more  IWMM 2000»
15 years 8 months ago
Cycles to Recycle: Garbage Collection on the IA-64
The IA-64, Intel's 64-bit instruction set architecture, exhibits a number of interesting architectural features. Here we consider those features as they relate to supporting ...
Richard L. Hudson, J. Eliot B. Moss, Sreenivas Sub...
CODES
2009
IEEE
15 years 8 months ago
TotalProf: a fast and accurate retargetable source code profiler
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
Lei Gao, Jia Huang, Jianjiang Ceng, Rainer Leupers...