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» Compiling for vector-thread architectures
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IFIPPACT
1994
14 years 10 months ago
Microcode Generation for Flexible Parallel Target Architectures
: Advanced architectural features of microprocessors like instruction level parallelism and pipelined functional hardware units require code generation techniques beyond the scope ...
Rainer Leupers, Wolfgang Schenk, Peter Marwedel
IEEEPACT
2000
IEEE
15 years 1 months ago
Region Formation Analysis with Demand-Driven Inlining for Region-Based Optimization
Region-based compilation repartitions a program into more desirable compilation units for optimization and scheduling, particularly beneficial for ILP architectures. With region-...
Tom Way, Ben Breech, Lori L. Pollock
SAMOS
2004
Springer
15 years 2 months ago
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting
Today’s Application Specific Instruction-set Processor (ASIP) design methodology often employs centralized Architecture Description Language (ADL) processor models, from which s...
Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Ra...
DAC
2000
ACM
15 years 10 months ago
Influence of compiler optimizations on system power
Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary ...
CASES
2008
ACM
14 years 11 months ago
Exploring and predicting the architecture/optimising compiler co-design space
Embedded processor performance is dependent on both the underlying architecture and the compiler optimisations applied. However, designing both simultaneously is extremely difficu...
Christophe Dubach, Timothy M. Jones, Michael F. P....