931 search results - page 15 / 187 » Compiling for vector-thread architectures |
CGO
2009
IEEE
15 years 4 months ago
2009
IEEE
Compilers employ many aggressive code transformations to achieve highly optimized code. However, because of complex target architectures and unpredictable optimization interaction...
IMS
2000
15 years 1 months ago
2000
Many architectural ideas that appear to be useful from a hardware standpoint fail to achieve wide acceptance due to lack of compiler support. In this paper we explore the design of...
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
Efficient architecture exploration and design of application specific instruction-set processors (ASIPs) requires retargetable software development tools, in particular C compil...
CODES
2001
IEEE
15 years 1 months ago
2001
IEEE
Most research to date on energy minimization in DSP processors has focuses on hardware solution. This paper examines the software-based factors affecting performance and energy co...
EUROPAR
1999
Springer
15 years 1 months ago
1999
Springer
Abstract. The High Performance Fortran (HPF) benchmark suite HPFBench was designed for evaluating the HPF language and compilers on scalable architectures. The functionality of the...