931 search results - page 163 / 187 » Compiling for vector-thread architectures |
TCAD
2008
14 years 9 months ago
2008
This paper describes an integer-linear-programming (ILP)-based system called Custom Hardware Instruction Processor Synthesis (CHIPS) that identifies custom instructions for critica...
TCAD
2008
14 years 9 months ago
2008
Embedded systems are constrained by the available memory. Code-compression techniques address this issue by reducing the code size of application programs. It is a major challenge ...
IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
In this paper we present the venture of porting two different algorithms for solving the two-dimensional advection PDE on the CBE platform, an in-place and an outof-place one, and ...
MICRO
2010
IEEE
14 years 7 months ago
2010
IEEE
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
MICRO
2010
IEEE
14 years 7 months ago
2010
IEEE
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...