931 search results - page 19 / 187 » Compiling for vector-thread architectures |
ASM
2008
ASM
14 years 11 months ago
2008
ASM
A Virtual Machine (VM) is a program running on a conventional microprocessor that emulates the binary instruction set, registers, and memory space of an idealized computing machine...
CC
2003
Springer
15 years 2 months ago
2003
Springer
Popular mobile code architectures (Java and .NET) include verifiers to check for memory safety and other security properties. Since their formats are relatively high level, suppor...
DAC
1992
ACM
15 years 1 months ago
1992
ACM
Designing instruction set processors and constructing their compilers are mutually dependent tasks. Piper is a high level synthesis tool of ADAS which controls the hardware-softwa...
EUROPAR
2008
Springer
14 years 11 months ago
2008
Springer
Abstract. We describe compiler and run-time optimisations for effective autoparallelisation of C++ programs on the Cell BE architecture. Auto-parallelisation is made easier by anno...
ICCD
1993
IEEE
15 years 1 months ago
1993
IEEE
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...