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FPL
2007
Springer
105views Hardware» more  FPL 2007»
15 years 6 months ago
An Execution Model for Hardware/Software Compilation and its System-Level Realization
We introduce a new execution model for orchestrating the interaction between the conventional processor and the reconfigurable compute unit in adaptive computer systems. We then ...
Holger Lange, Andreas Koch
LCPC
2004
Springer
15 years 5 months ago
Trimaran: An Infrastructure for Research in Instruction-Level Parallelism
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...
Lakshmi N. Chakrapani, John C. Gyllenhaal, Wen-mei...
CASES
2006
ACM
15 years 5 months ago
Automatic performance model construction for the fast software exploration of new hardware designs
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when there is only a simulator of the machine available. Designing such a compiler requ...
John Cavazos, Christophe Dubach, Felix V. Agakov, ...
WCRE
2000
IEEE
15 years 4 months ago
A Reference Architecture for Web Servers
A reference software architecture for a domain defines the fundamental components of the domain and the relations between them. Research has shown the benefits of having a referen...
Ahmed E. Hassan, Richard C. Holt
AAAI
2010
15 years 1 months ago
Evolving Compiler Heuristics to Manage Communication and Contention
As computer architectures become increasingly complex, hand-tuning compiler heuristics becomes increasingly tedious and time consuming for compiler developers. This paper presents...
Matthew E. Taylor, Katherine E. Coons, Behnam Roba...