931 search results - page 76 / 187 » Compiling for vector-thread architectures |
150
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CODES
2001
IEEE
15 years 8 months ago
2001
IEEE
Compiler technology is becoming a key component in the design of embedded systems, mostly due to increasing participation of software in the design process. Meeting system-level ob...
240
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ENTCS
2002
15 years 4 months ago
2002
The paper presents approaches to the validation of optimizing compilers. The emphasis is on aggressive and architecture-targeted optimizations which try to obtain the highest perf...
162
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POPL
2009
ACM
15 years 11 months ago
2009
ACM
We develop a rigorous semantics for Power and ARM multiprocessor programs, including their relaxed memory model and the behaviour of reasonable fragments of their instruction sets...
121
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SAMOS
2007
Springer
15 years 10 months ago
2007
Springer
This paper presents an overview of trends in low power handset SDR implementations. With the market for SDR-enabled handsets expected to grow to 200M units by 2014, the barriers to...
135
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IFL
2004
Springer
15 years 10 months ago
2004
Springer
Abstract. We describe the architecture of a virtual machine for executing functional logic programming languages. A distinguishing feature of our machine is that it preserves the o...