931 search results - page 81 / 187 » Compiling for vector-thread architectures |
128
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ACMMSP
2004
ACM
15 years 10 months ago
2004
ACM
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
131
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DAC
2005
ACM
15 years 6 months ago
2005
ACM
This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
121
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DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
Sophisticated C compiler support for network processors (NPUs) is required to improve their usability and consequently, their acceptance in system design. Nonetheless, high-level ...
146
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ASPLOS
2006
ACM
15 years 10 months ago
2006
ACM
Spatial Computing (SC) has been shown to be an energy-efficient model for implementing program kernels. In this paper we explore the feasibility of using SC for more than small k...
124
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ICS
2005
Tsinghua U.
15 years 10 months ago
2005
Tsinghua U.
A key step in program optimization is the determination of optimal values for code optimization parameters such as cache tile sizes and loop unrolling factors. One approach, which...