931 search results - page 99 / 187 » Compiling for vector-thread architectures |
131
click to vote
MICRO
1998
IEEE
15 years 9 months ago
1998
IEEE
The Multiscalar architecture advocates a distributed processor organization and task-level speculation to exploit high degrees of instruction level parallelism (ILP) in sequential...
110
click to vote
ISSS
1995
IEEE
15 years 8 months ago
1995
IEEE
The increasing usage of Application Specific Instruction Set Processors (ASIPs) in audio and video telecommunications has made strong demands on the rapid availability of dedicat...
130
click to vote
SC
1995
ACM
15 years 8 months ago
1995
ACM
: Data distribution is one of the key aspects that a parallelizing compiler for a distributed memory architecture should consider, in order to get efficiency from the system. The ...
137
click to vote
CORR
2010
Springer
15 years 4 months ago
2010
Springer
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
142
click to vote
VLSISP
2008
15 years 4 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...