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» Compiling for vector-thread architectures

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TC
2010

168views Information Technology» more TC 2010»

Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization

14 years 4 months ago

Download www.esa.informatik.tu-darmstadt.de

We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...

Holger Lange, Andreas Koch

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HIPEAC
2009
Springer

109views System Software» more HIPEAC 2009»

Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures

15 years 4 months ago

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Muhammad Umar Farooq, Lizy Kurian John, Margarida ...

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ASPDAC
2009
ACM

91views Hardware» more ASPDAC 2009»

Thermal-aware post compilation for VLIW architectures

15 years 4 months ago

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Wen-Wen Hsieh, TingTing Hwang

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CASES
2006
ACM

132views System Software» more CASES 2006»

Compiler optimization of embedded applications for an adaptive SoC architecture

15 years 3 months ago

Download www.cecs.uci.edu

Charles Hardnett, Krishna V. Palem, Yogesh Chobe

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SAMOS
2005
Springer

81views Embedded Systems» more SAMOS 2005»

Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures

15 years 2 months ago

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