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116
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LOPSTR
2004
Springer
15 years 9 months ago
Graph-Based Proof Counting and Enumeration with Applications for Program Fragment Synthesis
For use in earlier approaches to automated module interface adaptation, we seek a restricted form of program synthesis. Given some typing assumptions and a desired result type, we ...
J. B. Wells, Boris Yakobowski
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
15 years 7 months ago
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
Jordi Cortadella, Michael Kishinevsky, Steven M. B...
ISSS
1999
IEEE
87views Hardware» more  ISSS 1999»
15 years 7 months ago
Exploration and Synthesis of Dynamic Data Sets in Telecom Network Applications
We present a new exploration and optimization method to select customized implementations for dynamic data sets, as encountered in telecom network, database and multimedia applica...
Chantal Ykman-Couvreur, J. Lambrecht, Diederik Ver...
138
Voted
DAC
1989
ACM
15 years 7 months ago
Scheduling and Binding Algorithms for High-Level Synthesis
- New algorithms for high-level synthesis are presented. The first performs scheduling under hardware resource constraints and improves on commonly used list scheduling techniques ...
Pierre G. Paulin, John P. Knight
124
Voted
ARC
2008
Springer
104views Hardware» more  ARC 2008»
15 years 5 months ago
PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
Frank Hannig, Holger Ruckdeschel, Hritam Dutta, J&...