Sciweavers

2607 search results - page 296 / 522
» Complete Functional Synthesis
Sort
View
CODES
2004
IEEE
15 years 8 months ago
RTOS-centric hardware/software cosimulator for embedded system design
This paper presents an RTOS-centric hardwareisoftware cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is tha...
Shinya Honda, Takayuki Wakabayashi, Hiroyuki Tomiy...
DATE
2004
IEEE
184views Hardware» more  DATE 2004»
15 years 8 months ago
Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements
We show how to automatically verify that complex XScale-like pipelined machine models satisfy the same safety and liveness properties as their corresponding instruction set archit...
Panagiotis Manolios, Sudarshan K. Srinivasan
ECRTS
2004
IEEE
15 years 8 months ago
On Energy-Constrained Real-Time Scheduling
In this paper, we explore the feasibility and performance optimization problems for real-time systems that must remain functional during an operation/mission with a fixed, initial...
Tarek A. AlEnawy, Hakan Aydin
ESOP
2006
Springer
15 years 8 months ago
Step-Indexed Syntactic Logical Relations for Recursive and Quantified Types
We present a sound and complete proof technique, based on syntactic logical relations, for showing contextual equivalence of expressions in a -calculus with recursive types and imp...
Amal J. Ahmed
FDTC
2006
Springer
117views Cryptology» more  FDTC 2006»
15 years 8 months ago
DPA on Faulty Cryptographic Hardware and Countermeasures
Abstract. Balanced gates are an effective countermeasure against power analysis attacks only if they can be guaranteed to maintain their power balance. Traditional testing and reli...
Konrad J. Kulikowski, Mark G. Karpovsky, Alexander...