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128
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IOLTS
2003
IEEE
126views Hardware» more  IOLTS 2003»
15 years 8 months ago
Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits
A methodology for the synthesis of partially selfchecking multilevel logic circuits with low-cost paritybased concurrent error detection (CED) is described. A subset of the inputs...
Kartik Mohanram, Egor S. Sogomonyan, Michael G&oum...
115
Voted
DAC
2005
ACM
16 years 4 months ago
A new canonical form for fast boolean matching in logic synthesis and verification
? An efficient and compact canonical form is proposed for the Boolean matching problem under permutation and complementation of variables. In addition an efficient algorithm for co...
Afshin Abdollahi, Massoud Pedram
95
Voted
NOLISP
2005
Springer
15 years 8 months ago
Synthesis of Disordered Voices
This presentation concerns the simulation of disordered voices. The synthesis is based on shaping functions, which are nonlinear memoryless inputoutput characteristics that transfo...
Julien Hanquinet, Francis Grenez, Jean Schoentgen
ISCAS
2002
IEEE
82views Hardware» more  ISCAS 2002»
15 years 8 months ago
Logic synthesis for PLA with 2-input logic elements
In this paper, we present a new logic synthesis method for PLA with 2-input logic elements. A PLA with 2-input logic elements can achieve low-power dissipation and high-speed oper...
Hiroaki Yoshida, Hiroaki Yamaoka, Makoto Ikeda, Ku...
146
Voted
SIBGRAPI
1999
IEEE
15 years 7 months ago
Deterministic Texture Analysis and Synthesis Using Tree Structure Vector Quantization
Texture analysis and synthesis is very important for computer graphics, vision, and image processing. This paper describes an algorithm which can produce new textures with a matchi...
Li-Yi Wei