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122
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CIIA
2009
15 years 4 months ago
Physical Synthesis for CPLD Architectures
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...
Sid-Ahmed Senouci
101
Voted
JCLC
2006
73views more  JCLC 2006»
15 years 3 months ago
A Unit Selection-based Speech Synthesis Approach for Mandarin Chinese
The paper presents a unit selection-based speech synthesis approach for mandarin Chinese. Unit selection-based approach generates speech by selecting proper units from a speech co...
Minghui Dong, Kim-Teng Lua, Haizhou Li
VLSID
2003
IEEE
134views VLSI» more  VLSID 2003»
16 years 3 months ago
A Framework for Energy and Transient Power Reduction during Behavioral Synthesis
Abstract-- In battery driven portable applications, the minimization of energy, average power, peak power, and peak power differential are equally important to improve reliability ...
Saraju P. Mohanty, N. Ranganathan
124
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ISLPED
2005
ACM
111views Hardware» more  ISLPED 2005»
15 years 9 months ago
Peak temperature control and leakage reduction during binding in high level synthesis
Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...
132
Voted
ISMVL
2000
IEEE
121views Hardware» more  ISMVL 2000»
15 years 8 months ago
Evolvable Hardware: From On-Chip Circuit Synthesis to Evolvable Space Systems
Evolvable Hardware (EHW) refers to HW design and self-reconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, comments o...
Adrian Stoica