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» Completion Energies and Scale
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ISCA
2008
IEEE
130views Hardware» more  ISCA 2008»
15 years 8 months ago
Corona: System Implications of Emerging Nanophotonic Technology
We expect that many-core microprocessors will push performance per chip from the 10 gigaflop to the 10 teraflop range in the coming decade. To support this increased performance...
Dana Vantrease, Robert Schreiber, Matteo Monchiero...
IV
2008
IEEE
296views Visualization» more  IV 2008»
15 years 8 months ago
Revealing Subnetwork Roles using Contextual Visualization: Comparison of Metabolic Networks
This article is addressing a recurrent problem in biology: mining newly built large scale networks. Our approach consists in comparing these new networks to well known ones. The v...
Romain Bourqui, Fabien Jourdan
IPPS
2005
IEEE
15 years 7 months ago
Reducing Power with Performance Constraints for Parallel Sparse Applications
Sparse and irregular computations constitute a large fraction of applications in the data-intensive scientific domain. While every effort is made to balance the computational wor...
Guangyu Chen, Konrad Malkowski, Mahmut T. Kandemir...
TRIDENTCOM
2005
IEEE
15 years 7 months ago
Divide and Conquer: PC-Based Packet Trace Replay at OC-48 Speeds
Today’s Internet backbone networking devices need to be tested under realistic traffic conditions at transmission rates of OC-48 and above. While commercially available synthet...
Tao Ye, Darryl Veitch, Gianluca Iannaccone, Suprat...
ISCA
2002
IEEE
105views Hardware» more  ISCA 2002»
15 years 6 months ago
Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors
Due to shrinking technologies and increasing design sizes, it is becoming more difficult and expensive to distribute a global clock signal with low skew throughout a processor di...
Anoop Iyer, Diana Marculescu