89 search results - page 18 / 18 » Complex tilings |
TVCG
2008
13 years 6 months ago
2008
Abstract-We present a novel approach for latency-tolerant remote visualization and rendering where client-side frame rate display performance is independent of source dataset size,...
ISCA
2011
IEEE
12 years 10 months ago
2011
IEEE
Today’s chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specia...
TOG
2012
11 years 8 months ago
2012
Using existing programming tools, writing high-performance image processing code requires sacrificing readability, portability, and modularity. We argue that this is a consequenc...
BMCBI
2010
13 years 6 months ago
2010
Background: Chromatin immunoprecipitation (ChIP) followed by high-throughput sequencing (ChIP-seq) or ChIP followed by genome tiling array analysis (ChIP-chip) have become standar...