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» Complexity Dimensions and Learnability
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DSD
2009
IEEE
144views Hardware» more  DSD 2009»
15 years 6 months ago
Composable Resource Sharing Based on Latency-Rate Servers
Abstract—Verification of application requirements is becoming a bottleneck in system-on-chip design, as the number of applications grows. Traditionally, the verification comple...
Benny Akesson, Andreas Hansson, Kees Goossens
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
15 years 5 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
WADS
2001
Springer
113views Algorithms» more  WADS 2001»
15 years 4 months ago
Movement Planning in the Presence of Flows
This paper investigates the problem of time-optimum movement planning in two and three dimensions for a point robot which has bounded control velocity through a set of n polygonal...
John H. Reif, Zheng Sun
DAC
1998
ACM
15 years 4 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
FOCS
1991
IEEE
15 years 3 months ago
A General Approach to Removing Degeneracies
We wish to increase the power of an arbitrary algorithm designed for non-degenerate input, by allowing it to execute on all inputs. We concentrate on in nitesimal symbolic perturba...
Ioannis Z. Emiris, John F. Canny