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IESS
2007
Springer
165views Hardware» more  IESS 2007»
15 years 10 months ago
Data Reuse Driven Memory and Network-On-Chip Co-Synthesis
NoCs present a possible communication infrastructure solution to deal with increased design complexity and shrinking time-to-market. The communication infrastructure is a signific...
Ilya Issenin, Nikil Dutt
KI
2007
Springer
15 years 10 months ago
LiSA: A Robot Assistant for Life Sciences
This paper presents a mobile service robot that assists users in biological and pharmaceutical laboratories by carrying out routine jobs such as filling and transportation of micr...
Erik Schulenburg, Norbert Elkmann, Markus Fritzsch...
DATE
2006
IEEE
123views Hardware» more  DATE 2006»
15 years 10 months ago
Networks on chips for high-end consumer-electronics TV system architectures
Consumer electronics products, such as high-end (digital) TVs, contain complex systems on chip (SOC) that offer high computational performance at low cost. Traditionally, these SO...
Frits Steenhof, Harry Duque, Björn Nilsson, K...
IPPS
2006
IEEE
15 years 10 months ago
A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
Yingping Zhang, Taikyeong Jeong, Fei Chen, Haiping...
ISCAS
2006
IEEE
90views Hardware» more  ISCAS 2006»
15 years 10 months ago
Phase measurement and adjustment of digital signals using random sampling technique
—This paper introduces a technique to measure and adjust the relative phase of on-chip high speed digital signals using a random sampling technique of inferential statistics. The...
Rashed Zafar Bhatti, Monty Denneau, Jeff Draper
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