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HPCA
2006
IEEE
15 years 10 months ago
2006
IEEE
We propose dynamic scheduler designs to improve the scheduler scalability and reduce its complexity in the SMT processors. Our first design is an adaptation of the recently propos...
ICFP
2007
ACM
15 years 10 months ago
2007
ACM
The analysis and verification of higher-order programs raises the issue of control-flow analysis for higher-order languages. The problem of constructing an accurate call graph for...
ICCD
2004
IEEE
15 years 7 months ago
2004
IEEE
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...
ICCAD
2006
IEEE
15 years 7 months ago
2006
IEEE
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
85
Voted
DATE
2009
IEEE
15 years 5 months ago
2009
IEEE
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...