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100
Voted
DATE
2009
IEEE
15 years 7 months ago
2009
IEEE
In the field of chip design, hardware module reuse is a standard solution to the increasing complexity of chip architecture and the pressures to reduce time to market. In the abs...
95
Voted
DATE
2009
IEEE
15 years 7 months ago
2009
IEEE
Abstract—In this paper a programmable Forward Error Correction (FEC) IP for a DVB-S2 receiver is presented. It is composed of a Low-Density Parity Check (LDPC), a Bose-ChaudhuriH...
GLOBECOM
2009
IEEE
15 years 7 months ago
2009
IEEE
Abstract – This paper considers a design of signal constellations for trans-modulation (constellation rearrangement: CoRe) in a relay system with the multiple links in which the ...
118
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GLOBECOM
2009
IEEE
15 years 7 months ago
2009
IEEE
— Multiple Base Station (Multi-BS) cooperation has been considered as a promising mechanism to suppress cochannel interference and boost the capacity for cellular networks. Howev...
114
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GLVLSI
2009
IEEE
15 years 7 months ago
2009
IEEE
The sequential depth determines the completeness of bounded model checking in design verification. Recently, a SATbased method is proposed to compute the sequential depth of a de...