10608 search results - page 1799 / 2122 » Complexity of O'Hara's Algorithm |
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INFOCOM
2002
IEEE
15 years 5 months ago
2002
IEEE
-- High performance packet switches frequently use a centralized scheduler (also known as an arbiter) to determine the configuration of a non-blocking crossbar. The scheduler often...
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IOLTS
2002
IEEE
15 years 5 months ago
2002
IEEE
The reusing of the same hardware resources to implement speed-critical algorithms, without interrupting system operation, is one of the main reasons for the increasing use of reco...
122
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IPPS
2002
IEEE
15 years 5 months ago
2002
IEEE
Accurate estimation of signal delay is critical to the design and verification of VLSI circuits. At very high frequencies, signal delay in circuits with small feature sizes is do...
IPPS
2002
IEEE
15 years 5 months ago
2002
IEEE
A bulk synchronous computation proceeds in phases that are separated by barrier synchronization. For dynamic bulk synchronous computations that exhibit varying phase-wise computat...
ISCAS
2002
IEEE
15 years 5 months ago
2002
IEEE
As the complexity of embedded systems grows rapidly, it is common to accelerate critical tasks with hardware. Designers usually use off-the-shelf components or licensed IP cores t...