Sciweavers

1243 search results - page 239 / 249
» Complexity reduction of C-Algorithm
Sort
View
ISMVL
1997
IEEE
99views Hardware» more  ISMVL 1997»
15 years 1 months ago
Useful Application of CMOS Ternary Logic to the Realisation of Asynchronous Circuits
This paper shows how the application of a CMOS ternary logic is useful in the realisation of Delay Insensitive (01)asynchronous circuits. It is shown that fully DIasynchronous cir...
Riccardo Mariani, Roberto Roncella, Roberto Salett...
SPAA
1997
ACM
15 years 1 months ago
A Localized Algorithm for Parallel Association Mining
Discovery of association rules is an important database mining problem. Mining for association rules involves extracting patterns from large databases and inferring useful rules f...
Mohammed Javeed Zaki, Srinivasan Parthasarathy, We...
ICCAD
1996
IEEE
93views Hardware» more  ICCAD 1996»
15 years 1 months ago
VERILAT: verification using logic augmentation and transformations
This paper presents a new framework for formal logic verification. What is depicted here is fundamentally different from previous approaches. In earlier approaches, the circuit is ...
Dhiraj K. Pradhan, Debjyoti Paul, Mitrajit Chatter...
ISCA
1996
IEEE
126views Hardware» more  ISCA 1996»
15 years 1 months ago
Memory Bandwidth Limitations of Future Microprocessors
This paper makes the case that pin bandwidth will be a critical consideration for future microprocessors. We show that many of the techniques used to tolerate growing memory laten...
Doug Burger, James R. Goodman, Alain Kägi
ECP
1997
Springer
128views Robotics» more  ECP 1997»
15 years 1 months ago
SINERGY: A Linear Planner Based on Genetic Programming
In this paper we describe SINERGY, which is a highly parallelizable, linear planning system that is based on the genetic programming paradigm. Rather than reasoning about the world...
Ion Muslea