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ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
15 years 7 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
SSDBM
1999
IEEE
113views Database» more  SSDBM 1999»
15 years 7 months ago
Multidimensional Indexing and Query Coordination for Tertiary Storage Management
In many scientific domains, experimental devices or simulation programs generate large volumes of data. The volumes of data may reach hundreds of terabytes and therefore it is imp...
Arie Shoshani, Luis M. Bernardo, Henrik Nordberg, ...
EUROMICRO
1998
IEEE
15 years 7 months ago
System Level Modelling for Hardware/Software Systems
Industry is facing a crisis in the design of complex hardware/software systems. Due to the increasing complexity, the gap between the generation of a product idea and the realisat...
Jeroen Voeten, P. H. A. van der Putten, Marc Geile...
ICCAD
1998
IEEE
95views Hardware» more  ICCAD 1998»
15 years 7 months ago
Efficient analog circuit synthesis with simultaneous yield and robustness optimization
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
Geert Debyser, Georges G. E. Gielen
IPPS
1998
IEEE
15 years 7 months ago
Low Memory Cost Dynamic Scheduling of Large Coarse Grain Task Graphs
Schedulinglarge task graphsis an importantissue in parallel computingsince it allowsthe treatment of big size problems. In this paper we tackle the following problem: how to sched...
Michel Cosnard, Emmanuel Jeannot, Laurence Rougeot
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