Sciweavers

631 search results - page 71 / 127
» Composable memory transactions
Sort
View
CF
2005
ACM
14 years 11 months ago
Exploiting processor groups to extend scalability of the GA shared memory programming model
Exploiting processor groups is becoming increasingly important for programming next-generation high-end systems composed of tens or hundreds of thousands of processors. This paper...
Jarek Nieplocha, Manojkumar Krishnan, Bruce Palmer...
RTSS
2007
IEEE
15 years 4 months ago
Toward the Predictable Integration of Real-Time COTS Based Systems
The integration phase of real-time COTS-based systems is often problematic because when multiple tasks run concurrently, the interference at the bus level between cache fetching a...
Rodolfo Pellizzoni, Marco Caccamo
ACMMSP
2006
ACM
278views Hardware» more  ACMMSP 2006»
15 years 3 months ago
Atomicity via source-to-source translation
We present an implementation and evaluation of atomicity (also known as software transactions) for a dialect of Java. Our implementation is fundamentally different from prior work...
Benjamin Hindman, Dan Grossman
CIDR
2003
145views Algorithms» more  CIDR 2003»
14 years 11 months ago
Distributed Computing with BEA WebLogic Server
This paper surveys distributed computing techniques used in the implementation of BEA WebLogic Server. It discusses how application servers provide a distributed transactional inf...
Dean Jacobs
DATE
2010
IEEE
180views Hardware» more  DATE 2010»
15 years 2 months ago
A reconfigurable cache memory with heterogeneous banks
Abstract— The optimal size of a large on-chip cache can be different for different programs: at some point, the reduction of cache misses achieved when increasing cache size hits...
Domingo Benitez, Juan C. Moure, Dolores Rexachs, E...