We consider the problem of finding an optimal clock schedule, i.e. optimal arrival times for clock signals at latches of a VLSI chip. We describe a general model which includes al...
Parallel simulationhas the potentialto accelerate the execution of simulation applications. However, developing a parallel discrete-event simulation from scratch requires an in-de...
The exact knowledge of the heat flow in heterojunction bipolar transistors (HBT) during power operation is an important key factor for the systematic improvement of power density,...
Starting at the 65-nm node, stress engineering to improve the performance of transistors has been a major industry focus. An intrinsic stress source--shallow trench isolation (STI)...
Andrew B. Kahng, Puneet Sharma, Rasit Onur Topalog...
Abstract--With the objective of minimizing the total cost, which includes both sensor and congestion costs, the authors adopted a novel sampling theorem approach to address the pro...