Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed memory hierarchy enhancements for coher...
The purpose of this paper is to present some numerical tools which facilitate the interpretation of simulation or data fitting results and which allow to compute optimal experimen...
A major difficulty in compiler development regards the proper modularization of concerns among the various compiler phases. The traditional object-oriented development paradigm ha...
A test pattern generator (TPG) for built-in self-test (BIST), which can reduce switching activity during test application, is proposed. The proposed TPG, called dual-speed LFSR (DS...
In this paper, we propose an evolutionary approach to the design of output codes for multiclass pattern recognition problems. This approach has the advantage of taking into account...