Sciweavers

1240 search results - page 156 / 248
» Composition with Target Constraints
Sort
View
DATE
1999
IEEE
127views Hardware» more  DATE 1999»
15 years 2 months ago
Minimizing Sensitivity to Delay Variations in High-Performance Synchronous Circuits
This paper investigates retiming and clock skew scheduling for improving the tolerance of synchronous circuits to delay variations. It is shown that when both long and short paths...
Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman
DATE
1999
IEEE
123views Hardware» more  DATE 1999»
15 years 2 months ago
An Algorithm for Face-Constrained Encoding of Symbols Using Minimum Code Length
Different logic synthesis tasks have been formulated as input encoding problems but restricted to use a minimum number of binary variables. This paper presents an original column ...
Manuel Martínez, Maria J. Avedillo, Jos&eac...
RTAS
1998
IEEE
15 years 2 months ago
FARA - A Framework for Adaptive Resource Allocation in Complex Real-Time Systems
This paper introduces FARA, a framework that provides abstractions and mechanisms for building integrated adaptation and resource allocation services in complex real-time systems....
Daniela Rosu, Karsten Schwan, Sudhakar Yalamanchil...
CODES
2004
IEEE
15 years 1 months ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...
FCCM
2004
IEEE
109views VLSI» more  FCCM 2004»
15 years 1 months ago
Unifying Bit-Width Optimisation for Fixed-Point and Floating-Point Designs
This paper presents a method that offers a uniform treatment for bit-width optimisation of both fixed-point and floating-point designs. Our work utilises automatic differentiation...
Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk, Peter...