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» Compositional Memory Systems for Data Intensive Applications
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ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
15 years 6 months ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...
ICS
1999
Tsinghua U.
15 years 4 months ago
Improving memory hierarchy performance for irregular applications
The performance of irregular applications on modern computer systems is hurt by the wide gap between CPU and memory speeds because these applications typically underutilize multi-...
John M. Mellor-Crummey, David B. Whalley, Ken Kenn...
WETICE
2009
IEEE
15 years 7 months ago
Search Optimizations in Structured Peer-to-Peer Systems
Abstract—DHT systems are structured overlay networks capable of using P2P resources as a scalable platform for very large data storage applications. However, their efficiency ex...
Nuno Lopes, Carlos Baquero
97
Voted
CAV
2009
Springer
156views Hardware» more  CAV 2009»
15 years 7 months ago
Towards Performance Prediction of Compositional Models in Industrial GALS Designs
Systems and Networks on Chips (NoCs) are a prime design focus of many hardware manufacturers. In addition to functional verification, which is a difficult necessity, the chip desi...
Nicolas Coste, Holger Hermanns, Etienne Lantreibec...
DATE
2006
IEEE
114views Hardware» more  DATE 2006»
15 years 6 months ago
COSMECA: application specific co-synthesis of memory and communication architectures for MPSoC
Memory and communication architectures have a significant impact on the cost, performance, and time-to-market of complex multi-processor system-on-chip (MPSoC) designs. The memory...
Sudeep Pasricha, Nikil D. Dutt