9842 search results - page 390 / 1969 » Compositional timing analysis |
126
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DATE
2002
IEEE
15 years 10 months ago
2002
IEEE
Accurate gate-level static timing analysis in the presence of RC loads has become an important problem for modern deep-submicron designs. Non-capacitive loads are usually analyzed...
154
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JSSPP
2000
Springer
15 years 8 months ago
2000
Springer
Abstract. Buffered coscheduling is a new methodology that can substantially increase resource utilization, improve response time, and simplify the development of the run-time suppo...
149
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ASPDAC
2008
ACM
15 years 7 months ago
2008
ACM
The timing models used in current Static Timing Analysis tools use gate delays only for single input switching events. It is well known that the temporal proximity of signals arriv...
120
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FMICS
2008
Springer
15 years 6 months ago
2008
Springer
There has been relatively little work on the implementability of timing requirements. We have previously provided definitions of fundamental timing operators that explicitly consid...
154
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TCAD
2008
15 years 5 months ago
2008
Physical synthesis tools are responsible for achieving timing closure. Starting with 130nm designs, multiple cycles are required to cross the chip, making latch placement critical...