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IEEEPACT
2000
IEEE
15 years 9 months ago
Instruction Scheduling for Clustered VLIW DSPs
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special rest...
Rainer Leupers
IPPS
2000
IEEE
15 years 9 months ago
Switch Scheduling in the Multimedia Router (MMR)
The primary goal of the Multimedia Router (MMR) project is the design and implementation of a router optimized for multimedia applications. The router is targeted for use in clust...
Damon S. Love, Sudhakar Yalamanchili, José ...
SIBGRAPI
2000
IEEE
15 years 9 months ago
Image-Based Texture Analysis for Realistic Image Synthesis
We present a method to measure reflectance and texture of surfaces in a one step process. For later use in digital image synthesis it is mandatory to separate the gathered intensi...
Heinz Mayer
HPCA
1999
IEEE
15 years 9 months ago
The Synergy of Multithreading and Access/Execute Decoupling
This work presents and evaluates a novel processor microarchitecture which combines two paradigms: access/ execute decoupling and simultaneous multithreading. We investigate how b...
Joan-Manuel Parcerisa, Antonio González
147
Voted
IPPS
1999
IEEE
15 years 9 months ago
A Transformational Framework for Skeletal Programs: Overview and Case Study
A structured approach to parallel programming allows to construct applications by composing skeletons, i.e., recurring patterns of task- and data-parallelism. First academic and co...
Sergei Gorlatch, Susanna Pelagatti