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CVPR
2003
IEEE
16 years 6 months ago
Recognising and Monitoring High-Level Behaviours in Complex Spatial Environments
The recognition of activities from sensory data is important in advanced surveillance systems to enable prediction of high-level goals and intentions of the target under surveilla...
Nam Thanh Nguyen, Hung Hai Bui, Svetha Venkatesh, ...
ICCAD
1997
IEEE
144views Hardware» more  ICCAD 1997»
15 years 9 months ago
Exploiting off-chip memory access modes in high-level synthesis
Memory-intensive behaviors often contain large arrays that are synthesized into off-chip memories. With the increasing gap between on-chip and off-chip memory access delays, it is...
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
SPAA
1995
ACM
15 years 8 months ago
Accounting for Memory Bank Contention and Delay in High-Bandwidth Multiprocessors
For years, the computation rate of processors has been much faster than the access rate of memory banks, and this divergence in speeds has been constantly increasing in recent yea...
Guy E. Blelloch, Phillip B. Gibbons, Yossi Matias,...
ICDE
1996
IEEE
134views Database» more  ICDE 1996»
16 years 6 months ago
Parallel Pointer-Based Join Algorithms in Memory-mapped Environments
Three pointer-based parallel join algorithms are presented and analyzed for environments in which secondary storage is made transparent to the programmer through memory mapping. B...
Peter A. Buhr, Anil K. Goel, Naomi Nishimura, Prab...
ICCAD
2008
IEEE
127views Hardware» more  ICCAD 2008»
16 years 1 months ago
System-level power estimation using an on-chip bus performance monitoring unit
In this paper we propose an on-chip bus PMU which makes accurate estimates of system power consumption from a first-order linear power model by utilizing system-level activity in...
Youngjin Cho, Younghyun Kim, Sangyoung Park, Naehy...