2756 search results - page 62 / 552 » Computation-Centric Memory Models |
158
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ISCA
1999
IEEE
15 years 8 months ago
1999
IEEE
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
164
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TII
2010
14 years 10 months ago
2010
Abstract--Real-time systems are subject to temporal constraints and require a schedulability analysis to ensure that task execution finishes within lower and upper specified bounds...
137
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CHI
2002
ACM
16 years 4 months ago
2002
ACM
User interfaces can improve task performance by exploiting the powerful human capabilities for spatial cognition. This opportunity has been demonstrated by many prior experiments....
132
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TACAS
2010
Springer
15 years 11 months ago
2010
Springer
Modern multicore processors, such as the Cell Broadband Engine, achieve high performance by equipping accelerator cores with small “scratchpad” memories. The price for increase...
122
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DATE
2005
IEEE
15 years 9 months ago
2005
IEEE
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...