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PDP
2002
IEEE
15 years 9 months ago
A Parametrized Algorithm that Implements Sequential, Causal, and Cache Memory Consistency
In this paper we present an algorithm that can be used to implement sequential, causal, or cache consistency in distributed shared memory (DSM) systems. For this purpose it has a ...
Ernesto Jiménez, Antonio Fernández, ...
DLS
2009
182views Languages» more  DLS 2009»
15 years 1 months ago
Context-oriented software transactional memory in common lisp
Software transactional memory (STM) is a promising approach for coordinating concurrent threads, for which many implementation strategies are currently being researched. Although ...
Pascal Costanza, Charlotte Herzeel, Theo D'Hondt
CODES
2011
IEEE
14 years 3 months ago
SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs
Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for tr...
Cesare Ferri, Andrea Marongiu, Benjamin Lipton, R....
DAC
2007
ACM
16 years 5 months ago
Energy-Aware Data Compression for Multi-Level Cell (MLC) Flash Memory
We discover significant value-dependent programming energy variations in multi-level cell (MLC) flash memories, and introduce an energy-aware data compression method that minimize...
Yongsoo Joo, Youngjin Cho, Donghwa Shin, Naehyuck ...
ISCAS
2008
IEEE
136views Hardware» more  ISCAS 2008»
15 years 10 months ago
"Green" micro-architecture and circuit co-design for ternary content addressable memory
—In this paper, an energy-efficient and high performance ternary content addressable memory (TCAM) are presented. It employs the concept of “green” microarchitecture and circ...
Po-Tsang Huang, Shu-Wei Chang, Wen-Yen Liu, Wei Hw...