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SAC
2002
ACM
14 years 9 months ago
Statistical properties of the simulated time horizon in conservative parallel discrete-event simulations
We investigate the universal characteristics of the simulated time horizon of the basic conservative parallel algorithm when implemented on regular lattices. This technique [1, 2]...
G. Korniss, M. A. Novotny, A. K. Kolakowska, H. Gu...
75
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ISCA
2009
IEEE
148views Hardware» more  ISCA 2009»
15 years 4 months ago
Disaggregated memory for expansion and sharing in blade servers
Analysis of technology and application trends reveals a growing imbalance in the peak compute-to-memory-capacity ratio for future servers. At the same time, the fraction contribut...
Kevin T. Lim, Jichuan Chang, Trevor N. Mudge, Part...
CODES
2006
IEEE
15 years 3 months ago
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
Martijn Coenen, Srinivasan Murali, Andrei Radulesc...
ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
15 years 4 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...
JSA
2010
173views more  JSA 2010»
14 years 4 months ago
Hardware/software support for adaptive work-stealing in on-chip multiprocessor
During the past few years, embedded digital systems have been requested to provide a huge amount of processing power and functionality. A very likely foreseeable step to pursue th...
Quentin L. Meunier, Frédéric P&eacut...