With new sophisticated compiler technology, it is possible to schedule distant instructions efficiently. As a consequence, the amount of exploitable instruction level parallelism...
Anup Gangwar, M. Balakrishnan, Preeti Ranjan Panda...
Recent superscalar processors issue four instructions per cycle. These processors are also powered by highly-parallel superscalar cores. The potential performance can only be expl...
Thomas M. Conte, Kishore N. Menezes, Patrick M. Mi...
This paper presents computationally and physically augmented desktop objects - “Things that hover” - that is capable of moving autonomously on desktop, and discusses about tec...
UNICORE (UNiform Interface to COmputer REsources) provides a seamless and secure access to distributed supercomputer resources. This paper will give an overview of the its architec...
High efficiency in capacity utilization and fast restoration are two primary goals of survivable design in optical networks. Shared backup path protection has been shown to be effi...