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DATE
2005
IEEE
113views Hardware» more  DATE 2005»
15 years 10 months ago
Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures
With new sophisticated compiler technology, it is possible to schedule distant instructions efficiently. As a consequence, the amount of exploitable instruction level parallelism...
Anup Gangwar, M. Balakrishnan, Preeti Ranjan Panda...
ISCA
1995
IEEE
110views Hardware» more  ISCA 1995»
15 years 8 months ago
Optimization of Instruction Fetch Mechanisms for High Issue Rates
Recent superscalar processors issue four instructions per cycle. These processors are also powered by highly-parallel superscalar cores. The potential performance can only be expl...
Thomas M. Conte, Kishore N. Menezes, Patrick M. Mi...
CHI
2011
ACM
14 years 8 months ago
Things that hover: interaction with tiny battery-less robots on desktop
This paper presents computationally and physically augmented desktop objects - “Things that hover” - that is capable of moving autonomously on desktop, and discusses about tec...
Takashi Miyaki, Yong Ding, Behnam Banitalebi, Mich...
PACT
2001
Springer
15 years 9 months ago
UNICORE: A Grid Computing Environment for Distributed and Parallel Computing
UNICORE (UNiform Interface to COmputer REsources) provides a seamless and secure access to distributed supercomputer resources. This paper will give an overview of the its architec...
Valentina Huber
ICC
2007
IEEE
139views Communications» more  ICC 2007»
15 years 8 months ago
Comparison of Protection Mechanisms: Capacity Efficiency and Recovery Time
High efficiency in capacity utilization and fast restoration are two primary goals of survivable design in optical networks. Shared backup path protection has been shown to be effi...
Wensheng He, Arun K. Somani