4217 search results - page 702 / 844 » Computational indistinguishability logic |
DAC
2008
ACM
16 years 1 months ago
2008
ACM
Modern CMOS manufacturing processes have significant variability, which necessitates guard banding to achieve reasonable yield. We study an FPGA architecture with a dual voltage s...
66
Voted
DAC
2008
ACM
16 years 1 months ago
2008
ACM
The creation of an FPGA requires extensive transistor-level design. This is necessary for both the final design, and during architecture exploration, when many different logic and...
111
click to vote
DAC
2008
ACM
16 years 1 months ago
2008
ACM
C++ based verification methodologies are now emerging as the preferred method for SOC design. However most of the verification involving the C++ models are simulation based. The c...
102
Voted
DAC
2007
ACM
16 years 1 months ago
2007
ACM
FPGAs offer flexibility and cost-effectiveness that ASICs cannot match; however, their performance is quite poor in comparison, especially for arithmetic dominated circuits. To ad...
101
Voted
DAC
2007
ACM
16 years 1 months ago
2007
ACM
Modern combinational equivalence checking (CEC) engines are complicated programs which are difficult to verify. In this paper we show how a modern CEC engine can be modified to pr...