Sciweavers

4217 search results - page 704 / 844
» Computational indistinguishability logic
Sort
View
86
Voted
DAC
2002
ACM
16 years 1 months ago
A flexible accelerator for layer 7 networking applications
In this paper, we present a flexible accelerator designed for networking applications. The accelerator can be utilized efficiently by a variety of Network Processor designs. Most ...
Gokhan Memik, William H. Mangione-Smith
122
Voted
DAC
2003
ACM
16 years 1 months ago
Clock-tree power optimization based on RTL clock-gating
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
Monica Donno, Alessandro Ivaldi, Luca Benini, Enri...
76
Voted
DAC
2004
ACM
16 years 1 months ago
Defining coverage views to improve functional coverage analysis
Coverage analysis is used to monitor the quality of the verification process. Reports provided by coverage tools help users identify areas in the design that have not been adequat...
Sigal Asaf, Eitan Marcus, Avi Ziv
DAC
2004
ACM
16 years 1 months ago
Leakage-and crosstalk-aware bus encoding for total power reduction
Power consumption, particularly runtime leakage, in long on-chip buses has grown to an unacceptable portion of the total power budget due to heavy buffer insertion to combat RC de...
Harmander Deogun, Rajeev R. Rao, Dennis Sylvester,...
91
Voted
DAC
2004
ACM
16 years 1 months ago
Modular scheduling of guarded atomic actions
A modular synthesis flow is essential for a scalable and hierarchical design methodology. This paper considers a particular modular flow where each module has interface methods an...
Daniel L. Rosenband, Arvind