In many design tasks it is difficult to explicitly define an objective function. This paper uses machine learning to derive an objective in a feature space based on selected examp...
The Virtual Assembly Design Environment (VADE) is a Virtual Reality (VR) based engineering application which allows engineers to evaluate, analyze, and plan the assembly of mechan...
Sankar Jayaram, Yong Wang, Uma Jayaram, Kevin W. L...
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
Johnson Kin, Chunho Lee, William H. Mangione-Smith...
As process technology migrates to deep submicron with feature size less than 100nm, global wire delay is becoming a major hindrance in keeping the latency of intra-chip communicat...
Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watew...