Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
Structured ASICs have recently emerged as an exciting alternative to ASIC or FPGA design style as they provide a new trade-off between the high performance of ASIC design and low ...
We discuss a vision of and work in progress on a collaborative engineering environment, the Collaborative Design Studio, being developed at the Geometric and Intelligent Computing...
Jonathan Sevy, Vera Zaychik, Thomas T. Hewett, Wil...
With 90nm CMOS in production and 65nm testing in progress, power has been pushed to the forefront of design metrics. This paper will outline practical techniques that are used to ...
Citizen science projects can collect a wealth of scientific data, but that data is only helpful if it is actually used. While previous citizen science research has mostly focused ...
Sunyoung Kim, Christine Robson, Thomas Zimmerman, ...