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PPOPP
2009
ACM
16 years 6 months ago
Mapping parallelism to multi-cores: a machine learning based approach
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
Zheng Wang, Michael F. P. O'Boyle
SPAA
2009
ACM
16 years 6 months ago
Towards transactional memory semantics for C++
Transactional memory (TM) eliminates many problems associated with lock-based synchronization. Over recent years, much progress has been made in software and hardware implementati...
Tatiana Shpeisman, Ali-Reza Adl-Tabatabai, Robert ...
SPAA
2009
ACM
16 years 6 months ago
A lightweight in-place implementation for software thread-level speculation
Thread-level speculation (TLS) is a technique that allows parts of a sequential program to be executed in parallel. TLS ensures the parallel program's behaviour remains true ...
Cosmin E. Oancea, Alan Mycroft, Tim Harris
PODC
2009
ACM
16 years 6 months ago
Max registers, counters, and monotone circuits
A method is given for constructing a max register, a linearizable, wait-free concurrent data structure that supports a write operation and a read operation that returns the larges...
James Aspnes, Hagit Attiya, Keren Censor
HPCA
2009
IEEE
16 years 6 months ago
Architectural Contesting
Previous studies have proposed techniques to dynamically change the architecture of a processor to better suit the characteristics of the workload at hand. However, all such appro...
Hashem Hashemi Najaf-abadi, Eric Rotenberg
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