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VLSID
2006
IEEE
150views VLSI» more  VLSID 2006»
16 years 4 months ago
A Comprehensive SoC Design Methodology for Nanometer Design Challenges
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...
VLSID
2002
IEEE
159views VLSI» more  VLSID 2002»
16 years 4 months ago
Challenges in the Design of a Scalable Data-Acquisition and Processing System-on-Silicon
Increasing complexity of the functionalities and the resultant growth in number of gates integrated in a chip coupled with shrinking geometries and short cycle time requirements br...
Karanth Shankaranarayana, Soujanna Sarkar, R. Venk...
VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
16 years 4 months ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
VLSID
2001
IEEE
184views VLSI» more  VLSID 2001»
16 years 4 months ago
Battery Life Estimation of Mobile Embedded Systems
Since battery life directly impacts the extent and duration of mobility, one of the key considerations in the design of a mobile embedded system should be to maximize the energy d...
Debashis Panigrahi, Sujit Dey, Ramesh R. Rao, Kani...
POPL
2008
ACM
16 years 4 months ago
Cryptographically sound implementations for typed information-flow security
In language-based security, confidentiality and integrity policies conveniently specify the permitted flows of information between different parts of a program with diverse levels...
Cédric Fournet, Tamara Rezk
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