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CDES
2006
184views Hardware» more  CDES 2006»
15 years 5 months ago
Compilation for Future Nanocomputer Architectures
Compilation has a long history of translating a programmer's human-readable code into machine instructions designed to make good use of a specific target computer. In this pa...
Thomas P. Way
TOG
2008
134views more  TOG 2008»
15 years 3 months ago
Interactive visual editing of grammars for procedural architecture
We introduce a real-time interactive visual editing paradigm for shape grammars, allowing the creation of rulebases from scratch without text file editing. In previous work, shape...
Markus Lipp, Peter Wonka, Michael Wimmer
DSVIS
2000
Springer
15 years 8 months ago
Specifying Temporal Behaviour in Software Architectures for Groupware Systems
This paper presents an example of how software architectures can encode temporal properties as well as the traditional structural ones. In the context of expressing concurrency con...
Timothy N. Wright, T. C. Nicholas Graham, Tore Urn...
DAC
1998
ACM
15 years 8 months ago
OCCOM: Efficient Computation of Observability-Based Code Coverage Metrics for Functional Verification
—Functional simulation is still the primary workhorse for verifying the functional correctness of hardware designs. Functional verification is necessarily incomplete because it i...
Farzan Fallah, Srinivas Devadas, Kurt Keutzer
ASAP
2009
IEEE
159views Hardware» more  ASAP 2009»
15 years 10 months ago
A High-Performance Hardware Architecture for Spectral Hash Algorithm
—The Spectral Hash algorithm is one of the Round 1 candidates for the SHA-3 family, and is based on spectral arithmetic over a finite field, involving multidimensional discrete...
Ray C. C. Cheung, Çetin K. Koç, John...