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ICS
2003
Tsinghua U.
15 years 10 months ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
15 years 9 months ago
Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
David I. August, Daniel A. Connors, Scott A. Mahlk...
INTEGRATION
2007
100views more  INTEGRATION 2007»
15 years 4 months ago
A fast pipelined multi-mode DES architecture operating in IP representation
The Data Encryption Standard (DES) is a cipher that is still used in a broad range of applications, from smartcards, where it is often implemented as a tamperresistant embedded co...
Sylvain Guilley, Philippe Hoogvorst, Renaud Pacale...
ICWS
2009
IEEE
16 years 1 months ago
BlueInfo: Open Architecture for Deploying Web Services in WPAN Hotspots
We introduce BlueInfo, an open architecture for deploying web services in WPAN hotspots for cost-free context-aware mobile access over Bluetooth. A BlueInfo hotspot either pushes s...
Hannu Kukka, Fabio Kruger, Timo Ojala
ASAP
2008
IEEE
146views Hardware» more  ASAP 2008»
15 years 11 months ago
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary...