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DAC
2005
ACM
15 years 7 months ago
TCAM enabled on-chip logic minimization
This paper presents an efficient hardware architecture of an on-chip logic minimization coprocessor. The proposed architecture employs TCAM cells to provide fastest and memory eļ¬...
Seraj Ahmad, Rabi N. Mahapatra
WSC
2001
15 years 6 months ago
Use of DaSSF in a scalable multiprocessor wireless simulation architecture
The problem of efficient load distribution and scaling of large-scale wireless communication system simulation on multiprocessor architectures (both shared memory and cluster arra...
Trefor J. Delve, Nathan Smith
151
Voted
FCCM
2000
IEEE
162views VLSI» more  FCCM 2000»
15 years 9 months ago
StReAm: Object-Oriented Programming of Stream Architectures Using PAM-Blox
Simplifying the programming models is paramount to the success of reconfigurable computing. We apply the principles of object-oriented programming to the design of stream archite...
Oskar Mencer, Heiko Hübert, Martin Morf, Mich...
ICPP
1993
IEEE
15 years 9 months ago
Dependence Analysis and Architecture Design for Bit-Level Algorithms
:. In designing application-specific bit-level architectures and in programming existing bit-level processor arrays, it is necessary to expand a word-level algorithm into its bit-...
Weijia Shang, Benjamin W. Wah
145
Voted
CHI
2008
ACM
16 years 5 months ago
AutoCardSorter: designing the information architecture of a web site using latent semantic analysis
In this paper, we describe an innovative tool that supports the design and evaluation of the information architecture of a Web site. The tool uses Latent Semantic Analysis and hie...
Christos Katsanos, Nikolaos K. Tselios, Nikolaos M...