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PLSA
1994
15 years 9 months ago
Language and Architecture Paradigms as Object Classes
Computer language paradigms offer linguistic abstractions and proof theories for expressing program implementations. Similarly, system architectures offer the hardware abstractions...
Diomidis Spinellis, Sophia Drossopoulou, Susan Eis...
149
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IPPS
2003
IEEE
15 years 10 months ago
Performance Monitoring and Evaluation of a UPC Implementation on a NUMA Architecture
UPC is an explicit parallel extension of ANSI C, which has been gaining rising attention from vendors and users. In this work, we consider the low-level monitoring and experimenta...
François Cantonnet, Yiyi Yao, Smita Annared...
ICCV
2001
IEEE
16 years 7 months ago
Combining Single View Recognition and Multiple View Stereo for Architectural Scenes
This paper describes a structure from motion and recognition paradigm for generating 3D models from 2D sets of images. In particular we consider the domain of architectural photog...
Anthony R. Dick, Philip H. S. Torr, Simon J. Ruffl...
IPPS
2009
IEEE
15 years 11 months ago
Throughput-fairness tradeoff in Best Effort flow control for on-chip architectures
We consider two flow control schemes for Best Effort traffic in on-chip architectures, which can be deemed as the solutions to the boundary extremes of a class of utility maximi...
Fahimeh Jafari, Mohammad Sadegh Talebi, Mohammad H...
EUROPAR
2010
Springer
15 years 6 months ago
Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
Fenglong Song, Dongrui Fan, Zhiyong Liu, Junchao Z...