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DSD
2009
IEEE
147views Hardware» more  DSD 2009»
15 years 9 months ago
A High Performance Hardware Architecture for One Bit Transform Based Motion Estimation
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low computat...
Abdulkadir Akin, Yigit Dogan, Ilker Hamzaoglu
EDOC
2011
IEEE
14 years 4 months ago
Towards an Agile Design of the Enterprise Architecture Management Function
Abstract—Enterprise architecture (EA) management provides an engineering approach for the continuous advancement of the enterprise as a whole. The high number of involved compone...
Sabine Buckl, Florian Matthes, Ivan Monahov, Sasch...
ACIVS
2005
Springer
15 years 10 months ago
Designing Area and Performance Constrained SIMD/VLIW Image Processing Architectures
Abstract. Image processing is widely used in many applications, including medical imaging, industrial manufacturing and security systems. In these applications, the size of the ima...
Hamed Fatemi, Henk Corporaal, Twan Basten, Richard...
TCOM
2008
92views more  TCOM 2008»
15 years 5 months ago
Mailbox switch: a scalable two-stage switch architecture for conflict resolution of ordered packets
Abstract-- Traditionally, conflict resolution in an inputbuffered switch is solved by finding a matching between inputs and outputs per time slot. To do this, a switch not only nee...
Cheng-Shang Chang, Duan-Shin Lee, Ying-Ju Shih, Ch...
IPPS
2003
IEEE
15 years 10 months ago
Performance and Overhead in a Hybrid Reconfigurable Computer
In this paper, we overview general hardware architecture and a programming model of SRC-6ETM reconfigurable computers, and compare the performance of the SRC-6E machine vs. IntelÂ...
Osman Devrim Fidanci, Daniel S. Poznanovic, Kris G...