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MOMPES
2007
IEEE
15 years 4 months ago
Adopting Computational Independent Models for Derivation of Architectural Requirements of Software Product Lines
The alignment of the software architecture and the functional requirements of a system is a demanding task because of the difficulty in tracing design elements to requirements. Th...
Alexandre Bragança, Ricardo Jorge Machado
FCCM
2009
IEEE
134views VLSI» more  FCCM 2009»
15 years 1 months ago
Efficient Mapping of Hardware Tasks on Reconfigurable Computers Using Libraries of Architecture Variants
Scheduling and partitioning of task graphs on reconfigurable hardware needs to be carefully carried out in order to achieve the best possible performance. In this paper, we demons...
Miaoqing Huang, Vikram K. Narayana, Tarek A. El-Gh...
ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
15 years 3 months ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
ASAP
2005
IEEE
112views Hardware» more  ASAP 2005»
15 years 3 months ago
On the Advantages of Serial Architectures for Low-Power Reliable Computations
This paper explores low-power reliable microarchitectures for addition. Power, speed, and reliability (both defect- and fault-tolerance) are important metrics of system design, sp...
Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray R...
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
15 years 3 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...